Conference and Workshop Papers

Refereed Conferences and Workshops

  1. K.D. Cooper and K. Kennedy, “Efficient Computation of Flow Insensitive Interprocedural Summary Information,” Proceedings of the SIGPLAN 84 Symposium on Compiler Construction, ACM SIGPLAN Notices 19(6), June, 1984, pages 247-258.  doi
  2. K.D. Cooper, “Analyzing Aliases of Reference Formal Parameters”, Conference Record of the Twelfth Annual ACM SIGACT/SIGPLAN Symposium on Principles of Programming Languages, January 1985, pages 281-290.  doi
  3. K.D. Cooper, K. Kennedy, and L. Torczon, “The Impact of Interprocedural Analysis and Optimization on the Design of a Software Development Environment,” Proceedings of the SIGPLAN 85 Symposium on Language Issues in Programming Environments, ACM SIGPLAN Notices 20(7), July, 1985, pages 107-116.  doi
  4. K.D. Cooper, K. Kennedy, and L. Torczon, “Optimization of Compiled Code in the Rn Programming Environment,” Proceedings of the 19th Annual Hawaii International Conference on Systems Sciences, January, 1986, pages 492-502.  pdf version
  5. D. Callahan, K.D. Cooper, K. Kennedy, and L. Torczon, “Interprocedural Constant Propagation,” Proceedings of the SIGPLAN 86 Symposium on Compiler Construction, ACM SIGPLAN Notices 21(7), July, 1986, pages 152-161.  doi
  6. K.D. Cooper, K. Kennedy, and L. Torczon, “Interprocedural Optimization: Eliminating Unnecessary Recompilation,” Proceedings of the SIGPLAN 86 Symposium on Compiler Construction, ACM SIGPLAN Notices 21(7), July, 1986, pages 58-67.  doi
  7. K.D. Cooper, K. Kennedy, L. Torczon, A. Weingarten, and M. Wolcott, “Editing and Compiling Whole Programs,” Proceedings of the Second ACM SIGPLAN/SIGSOFT Symposium on Practical Software Development Environments, December, 1986, pages 92-101.   doi
  8. D. Callahan, K.D. Cooper, R.T. Hood, K. Kennedy, L. Torczon, and S.K. Warren, “Parallel Programming Support in ParaScope,” Parallel Computing in Science and Engineering: Proceedings of the Fourth International DFVLR Seminar on Foundations of Engineering Sciences, Bonn, Germany, June 1987, pages 89-106. Also appeared as Lecture Notes in Computer Science, 295/1988 Springer, Berlin, DE, 1988, pages 91-106.  doi
  9. K.D. Cooper and K. Kennedy, “Efficient Computation of Flow-Insensitive Interprocedural Summary Information – A Correction,” ACM SIGPLAN Notices 23(4), April, 1988, pages 35-42.    doi
  10. K.D. Cooper and K. Kennedy, “Interprocedural Side-Effect Analysis in Linear Time,” Proceedings of the SIGPLAN 88 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 23(7), July, 1988, pages 57-66.   doi
  11. K.D. Cooper and K. Kennedy, “Fast Interprocedural Alias Analysis,” Conference Record of the Sixteenth Annual ACM SIGACT/SIGPLAN Symposium on Principles of Programming Languages, January, 1989, pages 49-59.   doi
  12. P. Briggs, K.D. Cooper, K. Kennedy, and L. Torczon, “Coloring Heuristics for Register Allocation,” Proceedings of the SIGPLAN 89 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 24(7), July, 1989, pages 275-284.  doi
  13. K.D. Cooper, M.W. Hall, and K. Kennedy, “Procedure Cloning,” Proceedings of the IEEE Computer Society 1992 International Conference on Computer Languages, April, 1992, pages 96-105.  doi
  14. P. Briggs, K.D. Cooper, and L. Torczon, “Rematerialization,” Proceedings of the SIGPLAN 92 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 27(7), July, 1992, pages 311-321.  doi
  15. P. Briggs and K.D. Cooper, “Effective Partial Redundancy Elimination,” Proceedings of the SIGPLAN 94 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 29(6) June 1994, pages 159-170.  doi
  16. K.D. Cooper, K. Kennedy and N. McIntosh, “Cross-loop Reuse Analysis and its Application to Cache Optimizations,” Proceedings of the 9th International Workshop on Languages and Compilers for Parallel Computers (LCPC 96), San Jose, CA, August 1996, pages 1-19.   doi   Also appeared as Lecture Notes in Computer Science, 1239, Springer, Berlin, DE, 1997.  doi
  17. J. Lu and K.D. Cooper, “Register promotion in C programs,” Proceedings of the SIGPLAN 97 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 32(6), June 1997, pages 308-319.  doi
  18. K.D. Cooper and L.T. Simpson, “Live-range splitting in a graph coloring register allocator,” Proceedings of the 1998 International Conference on Compiler Construction, Lisbon, Portugal, March/April 1998. Also appeared as Lecture Notes in Computer Science 1383, Springer, Berlin, DE, 1998, pages 174-187.  doi
  19. K.D. Cooper and P.J. Schielke, “Non-local instruction scheduling with limited code growth,” 1998 ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES), Montreal, CA, June 1998. Also appeared as Lecture Notes in Computer Science, 1474, Springer, Berlin, DE, 1988, pages 193-207.  doi
  20. K.D. Cooper and T.J. Harvey, “Compiler-controlled memory,” Proceedings of the Eighth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), San Jose, CA, October 1998, pages 2-11. Also appeared as: ACM SIGPLAN Notices, 33(11), November 1998; ACM SIGOPS Operating Systems Review, 32(5), December 1998; and ACM SIGARCH Computer Architecture News, 26 (Special Issue), October 1998.  doi
  21. K.D. Cooper and N. McIntosh, “Enhanced Code Compression for Embedded RISC Processors,” Proceedings of the SIGPLAN 99 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 34(4), pages 139-149.  doi
  22. K.D. Cooper, P.J. Schielke, and D. Subramanian, “Optimizing for Reduced Code Space using Genetic Algorithms,” 1999 ACM SIGPLAN Workshop on Languages, Compilers, and Tools for Embedded Systems (LCTES), ACM SIGPLAN Notices 34(7), Atlanta, GA, May 1999, pages 1-9.  doi
  23. Z. Budimlic, K.D. Cooper, T.J. Harvey, K. Kennedy, S. Reeves, and T. Oberg, “Fast Copy Coalescing and Live-range Identification without an Interference Graph,” Proceedings of the SIGPLAN 2002 Conference on Programming Language Design and Implementation, ACM SIGPLAN Notices 37(5), May 2002, pages 25-32.  doi
  24. K.D. Cooper and L. Xu, “An Efficient Static Analysis Algorithm to Detect Redundant Memory Operations,” Proceedings of the 2002 Workshop on Memory Systems Performance, ACM SIGPLAN Notices 38(2), Berlin, DE, June 16, 2002, pages 97-107.  doi
  25. K.D. Cooper and T. Waterman, “Understanding Energy Consumption on the C62x”, Workshop on Compilers and Operating Systems for Low Power, Charlottesville, VA, USA, September 22, 2002.  pdf format
  26. K.D. Cooper, A. Dasgupta, and K. Kennedy, “Vizer: A System to Vectorize X86 Binaries”, Proceedings of the 2002 LACSI Symposium, Los Alamos Computer Science Institute, Santa Fe, NM, USA, October 2002.  pdf format
  27. K. Kennedy, M. Mazina, J. Mellor-Crummey, K. Cooper, F. Berman, A. Chien, H. Dail, O. Sievert, D. Angulo, I. Foster, R. Aydt, D. Reed, D. Gannon, J. Dongarra, S. Vadhiyar, L. Johnsson, R. Wolski, and C. Kesselman), “Toward a Framework for Preparing and Executing Adaptive Grid Programs,” Proceedings of the International Parallel and Distributed Processing Symposium (IPDPS ’02), 2002.  doi
  28. K.D. Cooper and L. Xu, “Memory Redundancy Elimination to Improve Application Energy Efficiency,” Proceedings of the 16th International Workshop on Languages and Compilers for Parallel Computers (LCPC), College Station, TX, USA, October 2003. Also appeared as Lecture Notes in Computer Science 2958, Springer, Berlin, DE, 2003.  doi
  29. D. Callahan, K.D. Cooper, K. Kennedy, and L. Torczon, “Interprocedural Constant Propagation,” in Best of PLDI 1979-1999 (Special issue), ACM SIGPLAN Notices 39(4), April 2004, pages 155-166. (Republished with a retrospective, originally appeared in PLDI `86)  doi
  30. K.D. Cooper and K. Kennedy, “Interprocedural Side-Effect Analysis in Linear Time,” in Best of PLDI 1979-1999 (Special issue), ACM SIGPLAN Notices 39(4), April 2004, pages 217-228. (Republished with a retrospective, originally appeared in PLDI `88)   doi
  31. P. Briggs, K.D. Cooper, K. Kennedy, and L. Torczon, “Coloring Heuristics for Register Allocation,” in Best of PLDI 1979-1999 (Special issue), ACM SIGPLAN Notices 39(4), April 2004, pages 283-294. (Republished with a retrospective, originally appeared in PLDI `89)  doi
  32. A. Mandal, K.D. Cooper, A. Dasgupta, K. Kennedy, M. Mazina, G. Marin, J.M. Mellor-Crummey, B. Liu, and L. Johnsson, “Scheduling Workflow Applications in GrADS”, Proceedings of the Fourth IEEE/ACM Symposium on Cluster Computing and the Grid (CCGrid 2004), April 2004, Chicago, IL, USA, IEEE Computer Society, pages 790-797.  doi
  33. L. Almagor, K.D. Cooper, A. Grosul, T.J. Harvey, S.W. Reeves, D. Subramanian, L. Torczon, and T. Waterman, “Finding Effective Compilation Sequences,” Proceedings of the 2004 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Washington, DC, USA, June, 2004, pages 231-239. Also appeared as ACM SIGPLAN Notices 39(7).  doi
  34. K.D. Cooper, A. Grosul, T.J. Harvey, S. Reeves, D. Subramanian, L. Torczon, and T. Waterman, “ACME: Adaptive Compilation Made Efficient/Easy,” Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES), Chicago, IL, USA, June 2005, pages 69-77. Also appeared as ACM SIGPLAN Notices 40(7).  doi
  35. K.D. Cooper and J. Eckhardt, “Improved Passive Splitting,” Proceedings of the 2005 International Conference on Programming Languages and Compilers, Las Vegas, NV, USA, June 27-30, 2005, CSREA Press, pages 115-122.  pdf version
  36. K.D. Cooper, A. Dasgupta, and J. Eckhardt, “Revisiting Graph Coloring Register Allocation: A Study of the Chaitin-Briggs and Callahan-Koblenz Algorithms,” Proceedings of the 18th International Workshop on Languages and Compilers for Parallel Computing (LCPC), Hawthorne, NY, USA, October 2005.  doi
  37. K.D. Cooper and A. Dasgupta, “Tailoring Graph-coloring Register Allocation for Runtime Compilation,” Proceedings of the 4th International Symposium on Code Generation and Optimization (CGO), March 2006, New York, New York, USA, pages 36-49.  doi
  38. K.D. Cooper, T.J. Harvey, and K. Kennedy, “An Empirical Study of Iterative Data-Flow Analysis,” Proceedings of the 15th International Conference on Computing (CIC ’06), Mexico City, DF, Mexico, November 2006, pages 266-276.  doi
  39. K.D. Cooper, T.J. Harvey, and J. Sandoval, “Tuning an Adaptive Compiler,” Proceedings of the First Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation(SMART 07), Ghent, Belgium, January 2007.  pdf version   full proceedings
  40. K.D. Cooper, Y. Guo, and D. Subramanian, “An Effective Local Search Algorithm for an Adaptive Compiler,”Proceedings of the First Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation (SMART 07), Ghent, Belgium, January 2007.  pdf version   full proceedings
  41. K.D. Cooper, T.J. Harvey, and D.M. Peixotto, “Chow and Hennessy vs. Chaitin-Briggs Register Allocation: Using Adaptive Compilation to Fairly Compare Algorithms,” Proceedings of the Second Workshop on Statistical and Machine Learning Approaches Applied to Architectures and Compilation (SMART 08), Goteborg, Sweden, January 2008.  pdf version
  42. K.D. Cooper, T.J. Harvey, and T. Waterman, “An Adaptive Strategy for Inline Substitution,” Proceedings of the 2008 International Conference on Compiler Construction (CC 2008), March 2008, pages 69-84.  doi  Also appeared as Springer Lecture Notes in Computer Science, number 4959.  doi
  43. K. Cooper, J. Eckhardt, and K. Kennedy, “Redundancy Elimination Revisited,” Proceedings of the 7th International Conference on Parallel Architectures and Compilation Techniques (PACT ’08), Toronto, Ontario, Canada, October 2008, pages 12-21.  doi
  44. Y. Zhang, C. Koelbel, and K. Cooper, “Cluster-Based Hybrid Scheduling Mechanisms for Workflow Applications on the Grid,” Proceedings of the Fourth IEEE International Conference on eScience, December 2008, pages 390-391.  doi
  45. Y. Zhang, C. Koelbel, and K. Cooper, “Hybrid Re-scheduling Mechanisms for Workflow Applications on a Multi-cluster Grid,” Proceedings of the IEEE International Symposium on Cluster Computing and the Grid, Shanghai, China, May 2009, pages 116-123.  doi
  46. Y. Zhang, A. Mandal, C. Koelbel, and K. Cooper, “Combined Fault Tolerance and Scheduling Techniques for Workflow Applications on Computational Grids,” Proceedings of the IEEE International Symposium on Cluster Computing and the Grid, Shanghai, China, May 2009, pages 244-251.  doi
  47. Y. Zhang, C. Koelbel, and K. Cooper, “Batch Queue Resource Co-scheduling for Workflow Applications, Proceedings of IEEE Cluster 2009, New Orleans, LA, USA, September 2009, pages 1-10.  doi
  48. K.D. Cooper and J.A. Sandoval, “Dynamic Compilation for Component-Based High-Performance Computing (extended abstract),” Workshop on Component-Based High-Performance Computing (CBHPC) 2009, Portland, OR, USA, November 2009.  doi
  49. M.M Chabbi, J. Mellor-Crummey, and K.D. Cooper, “Efficiently Exploring Compiler Optimization Sequences with Pairwise Pruning,” Proceedings of the 1st ACM International Workshop on Adaptive Self-Tuning Computing Systems for the Exaflop Era (EXADAPT 2011), San Jose, CA, June 5, 2011.  doi
  50. K. Cooper and X. Xu, “Efficient Characterization of Hidden Processor Memory Hierarchies”, International Conference on Computational ScienceWuxi, China, 2018    (Lecture Notes in Computer Science 10862) doi
  51. X. Xu, K. Cooper, J. Brock, Y. Zhang, and H. YE, “ShareJIT: JIT Code Cache Sharing Across Processes and Its Practical Implementation,” Proceedings of the ACM on Programming Languages (PACMPL), Volume 2 (OOPSLA), October 2018, Article 124, pages 1-23, doi

Unrefereed Workshop Papers

  1. P. Briggs, K.D. Cooper, and L. Torczon, “Aggressive Live Range Splitting,” Code 91 – Concepts, Tools, and Techniques, Schloss Dagstuhl, Germany, May, 1991.  pdf version
  2. K.D. Cooper, “Using Compiler Technology to Drive Advanced Microprocessors,” Proceedings of the DARPA Software Technology Conference, Los Angeles, CA, April 28-30, 1992, pages 42-49.  pdf version
  3. P. Briggs and K.D. Cooper, “Compilers, Microprocessors, and Memory Systems,” NSF Workshop on High Performance Memory Systems, Charlottesville, Virginia, April, 1993.  pdf version   (Proceedings available as University of Virginia, Computer Science Technical Report TR-93-35, June 18, 1993.)

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